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Searched refs:mmUVD_SCRATCH9 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h60 #define mmUVD_SCRATCH9 macro
H A Dvcn_2_5_offset.h433 #define mmUVD_SCRATCH9 macro
H A Dvcn_2_0_0_offset.h418 #define mmUVD_SCRATCH9 macro
H A Dvcn_3_0_0_offset.h709 #define mmUVD_SCRATCH9 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c170 SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9); in vcn_v1_0_sw_init()
H A Dvcn_v2_0.c186 adev->vcn.inst->external.scratch9 = SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9); in vcn_v2_0_sw_init()
H A Dvcn_v2_5.c213 adev->vcn.inst[j].external.scratch9 = SOC15_REG_OFFSET(VCN, j, mmUVD_SCRATCH9); in vcn_v2_5_sw_init()
H A Dvcn_v3_0.c206 adev->vcn.inst[i].external.scratch9 = SOC15_REG_OFFSET(VCN, i, mmUVD_SCRATCH9); in vcn_v3_0_sw_init()