Searched refs:mmUVD_RB_BASE_LO3 (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_6_0_d.h | 58 #define mmUVD_RB_BASE_LO3 0x3d1d macro
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| H A D | uvd_7_0_offset.h | 132 #define mmUVD_RB_BASE_LO3 … macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 292 #define mmUVD_RB_BASE_LO3 … macro
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| H A D | vcn_2_5_offset.h | 571 #define mmUVD_RB_BASE_LO3 … macro
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| H A D | vcn_2_0_0_offset.h | 482 #define mmUVD_RB_BASE_LO3 … macro
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| H A D | vcn_3_0_0_offset.h | 901 #define mmUVD_RB_BASE_LO3 … macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v1_0.c | 61 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO3),
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| H A D | vcn_v2_0.c | 69 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO3),
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| H A D | vcn_v2_5.c | 72 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO3),
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| H A D | vcn_v3_0.c | 76 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO3),
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