Searched refs:mmUVD_RB_BASE_LO (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_6_0_d.h | 44 #define mmUVD_RB_BASE_LO 0x3c26 macro
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| H A D | uvd_7_0_offset.h | 94 #define mmUVD_RB_BASE_LO … macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 216 #define mmUVD_RB_BASE_LO … macro
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| H A D | vcn_2_5_offset.h | 551 #define mmUVD_RB_BASE_LO … macro
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| H A D | vcn_2_0_0_offset.h | 928 #define mmUVD_RB_BASE_LO … macro
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| H A D | vcn_3_0_0_offset.h | 881 #define mmUVD_RB_BASE_LO … macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v2_0.c | 65 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO),
1128 WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr); in vcn_v2_0_start()
1280 WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr); in vcn_v2_0_pause_dpg_mode()
1995 SOC15_REG_OFFSET(UVD, i, mmUVD_RB_BASE_LO), in vcn_v2_0_start_sriov()
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| H A D | vcn_v2_5.c | 68 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO),
1186 WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO, ring->gpu_addr); in vcn_v2_5_start()
1357 SOC15_REG_OFFSET(VCN, i, mmUVD_RB_BASE_LO), in vcn_v2_5_sriov_start()
1537 WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO, ring->gpu_addr); in vcn_v2_5_pause_dpg_mode()
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| H A D | vcn_v3_0.c | 72 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO),
1309 WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO, ring->gpu_addr); in vcn_v3_0_start()
1442 mmUVD_RB_BASE_LO), in vcn_v3_0_start_sriov()
1686 WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO, ring->gpu_addr); in vcn_v3_0_pause_dpg_mode()
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| H A D | vcn_v1_0.c | 57 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO),
988 WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr); in vcn_v1_0_start_spg_mode()
1288 WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr); in vcn_v1_0_pause_dpg_mode()
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| H A D | uvd_v7_0.c | 923 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_RB_BASE_LO), ring->gpu_addr); in uvd_v7_0_sriov_start()
1118 WREG32_SOC15(UVD, k, mmUVD_RB_BASE_LO, ring->gpu_addr); in uvd_v7_0_start()
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| H A D | uvd_v6_0.c | 869 WREG32(mmUVD_RB_BASE_LO, ring->gpu_addr); in uvd_v6_0_start()
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