Searched refs:mmUVD_RB_BASE_HI4 (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 414 #define mmUVD_RB_BASE_HI4 … macro
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| H A D | vcn_2_5_offset.h | 583 #define mmUVD_RB_BASE_HI4 … macro
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| H A D | vcn_2_0_0_offset.h | 764 #define mmUVD_RB_BASE_HI4 … macro
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| H A D | vcn_3_0_0_offset.h | 913 #define mmUVD_RB_BASE_HI4 … macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v1_0.c | 62 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_HI4),
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| H A D | vcn_v2_0.c | 70 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_HI4),
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| H A D | vcn_v2_5.c | 73 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_HI4),
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| H A D | vcn_v3_0.c | 77 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_HI4),
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