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Searched refs:mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_offset.h857 #define mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW … macro
H A Dvcn_2_0_0_offset.h952 #define mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW … macro
H A Dvcn_3_0_0_offset.h1275 #define mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v2_0.c421 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v2_0_mc_resume()
514 UVD, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v2_0_mc_resume_dpg_mode()
H A Dvcn_v2_5.c653 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v2_5_disable_clock_gating()
745 VCN, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v2_5_clock_gating_dpg_mode()
H A Dvcn_v3_0.c559 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v3_0_mc_resume_dpg_mode()
651 VCN, inst_idx, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v3_0_disable_static_power_gating()