Home
last modified time | relevance | path

Searched refs:mmTPC_PLL_DIV_SEL_1 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc_pll_regs.h62 #define mmTPC_PLL_DIV_SEL_1 0xE01284 macro
/linux/drivers/accel/habanalabs/goya/
H A Dgoya.c1427 WREG32(mmTPC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()