Home
last modified time | relevance | path

Searched refs:mmTPC5_CMDQ_GLBL_CFG0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc5_cmdq_regs.h22 #define mmTPC5_CMDQ_GLBL_CFG0 0xF49000 macro
/linux/drivers/accel/habanalabs/goya/
H A Dgoya_security.c1785 pb_addr = (mmTPC5_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; in goya_init_tpc_protection_bits()
1786 word_offset = ((mmTPC5_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; in goya_init_tpc_protection_bits()
1787 mask = 1 << ((mmTPC5_CMDQ_GLBL_CFG0 & 0x7F) >> 2); in goya_init_tpc_protection_bits()
H A Dgoya.c2090 WREG32(mmTPC5_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()