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Searched refs:mmTPC5_CFG_QM_TENSOR_4_BASE_ADDR_LOW (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc5_cfg_regs.h614 #define mmTPC5_CFG_QM_TENSOR_4_BASE_ADDR_LOW 0xF46B30 macro
/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dtpc5_cfg_regs.h794 #define mmTPC5_CFG_QM_TENSOR_4_BASE_ADDR_LOW 0xF46AE0 macro