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Searched refs:mmTPC4_RTR_SPLIT_COEF_0 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc4_rtr_regs.h142 #define mmTPC4_RTR_SPLIT_COEF_0 0xF00400 macro
/linux/drivers/accel/habanalabs/goya/
H A Dgoya.c1771 WREG32(mmTPC4_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()