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Searched refs:mmTD_CNTL (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1639 #define mmTD_CNTL 0x2525 macro
H A Dgfx_7_0_d.h2071 #define mmTD_CNTL 0x2525 macro
H A Dgfx_7_2_d.h2092 #define mmTD_CNTL 0x2525 macro
H A Dgfx_8_1_d.h2262 #define mmTD_CNTL 0x2525 macro
H A Dgfx_8_0_d.h2283 #define mmTD_CNTL 0x2525 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c691 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x00001800, 0x00000800),
707 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01000000, 0x01000000)
746 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01bd9f33, 0x00000800)
768 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01bd9f33, 0x01000000),
826 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01bd9f33, 0x01000000),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h833 #define mmTD_CNTL … macro
H A Dgc_9_1_offset.h807 #define mmTD_CNTL … macro
H A Dgc_9_2_1_offset.h783 #define mmTD_CNTL … macro
H A Dgc_10_1_0_offset.h2731 #define mmTD_CNTL … macro