Searched refs:mmTCP_WATCH0_CNTL (Results 1 – 11 of 11) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v10.c | 937 WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) + in kgd_gfx_v10_set_address_watch()
969 WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) + in kgd_gfx_v10_set_address_watch()
991 WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) + in kgd_gfx_v10_clear_address_watch()
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| H A D | amdgpu_amdkfd_gfx_v9.c | 854 WREG32_RLC((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) + in kgd_gfx_v9_set_address_watch()
872 WREG32_RLC((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) + in kgd_gfx_v9_set_address_watch()
886 WREG32_RLC((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) + in kgd_gfx_v9_clear_address_watch()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 2142 #define mmTCP_WATCH0_CNTL 0x32a2 macro
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| H A D | gfx_7_2_d.h | 2163 #define mmTCP_WATCH0_CNTL 0x32a2 macro
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| H A D | gfx_8_1_d.h | 2334 #define mmTCP_WATCH0_CNTL 0x32a2 macro
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| H A D | gfx_8_0_d.h | 2355 #define mmTCP_WATCH0_CNTL 0x32a2 macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 3001 #define mmTCP_WATCH0_CNTL … macro
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| H A D | gc_9_1_offset.h | 3231 #define mmTCP_WATCH0_CNTL … macro
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| H A D | gc_9_2_1_offset.h | 3183 #define mmTCP_WATCH0_CNTL … macro
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| H A D | gc_10_1_0_offset.h | 5505 #define mmTCP_WATCH0_CNTL … macro
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| H A D | gc_10_3_0_offset.h | 5138 #define mmTCP_WATCH0_CNTL … macro
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