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Searched refs:mmSQ_LB_CTR_SEL0 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h2549 #define mmSQ_LB_CTR_SEL0 macro
H A Dgc_10_3_0_offset.h2640 #define mmSQ_LB_CTR_SEL0 macro