Searched refs:mmSQC_EDC_PARITY_CNT3 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_4.c | 68 { SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3), 0, 4, 6 },
258 SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),
264 SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),
275 SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),
279 SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),
290 SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),
296 SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),
307 SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),
311 SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_1_offset.h | 158 #define mmSQC_EDC_PARITY_CNT3 … macro
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