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Searched refs:mmSQC_EDC_CNT3_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h157 #define mmSQC_EDC_CNT3_BASE_IDX macro
H A Dgc_9_0_offset.h454 #define mmSQC_EDC_CNT3_BASE_IDX macro
H A Dgc_9_1_offset.h448 #define mmSQC_EDC_CNT3_BASE_IDX macro