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Searched refs:mmSPI_WCL_PIPE_PERCENT_GFX (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1410 #define mmSPI_WCL_PIPE_PERCENT_GFX 0x31c7 macro
H A Dgfx_7_2_d.h1427 #define mmSPI_WCL_PIPE_PERCENT_GFX 0x31c7 macro
H A Dgfx_8_1_d.h1574 #define mmSPI_WCL_PIPE_PERCENT_GFX 0x31c7 macro
H A Dgfx_8_0_d.h1606 #define mmSPI_WCL_PIPE_PERCENT_GFX 0x31c7 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2695 #define mmSPI_WCL_PIPE_PERCENT_GFX … macro
H A Dgc_9_1_offset.h2939 #define mmSPI_WCL_PIPE_PERCENT_GFX … macro
H A Dgc_9_2_1_offset.h2881 #define mmSPI_WCL_PIPE_PERCENT_GFX … macro
H A Dgc_10_1_0_offset.h5179 #define mmSPI_WCL_PIPE_PERCENT_GFX … macro
H A Dgc_10_3_0_offset.h4844 #define mmSPI_WCL_PIPE_PERCENT_GFX … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c6874 amdgpu_ring_emit_wreg(ring, mmSPI_WCL_PIPE_PERCENT_GFX, val); in gfx_v8_0_emit_wave_limit()
H A Dgfx_v9_0.c7153 SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_GFX), in gfx_v9_0_emit_wave_limit()