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Searched refs:mmSPI_WCL_PIPE_PERCENT_CS2 (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1414 #define mmSPI_WCL_PIPE_PERCENT_CS2 0x31cb macro
H A Dgfx_7_2_d.h1431 #define mmSPI_WCL_PIPE_PERCENT_CS2 0x31cb macro
H A Dgfx_8_1_d.h1578 #define mmSPI_WCL_PIPE_PERCENT_CS2 0x31cb macro
H A Dgfx_8_0_d.h1610 #define mmSPI_WCL_PIPE_PERCENT_CS2 0x31cb macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2703 #define mmSPI_WCL_PIPE_PERCENT_CS2 … macro
H A Dgc_9_1_offset.h2947 #define mmSPI_WCL_PIPE_PERCENT_CS2 … macro
H A Dgc_9_2_1_offset.h2889 #define mmSPI_WCL_PIPE_PERCENT_CS2 … macro
H A Dgc_10_1_0_offset.h5187 #define mmSPI_WCL_PIPE_PERCENT_CS2 … macro
H A Dgc_10_3_0_offset.h4852 #define mmSPI_WCL_PIPE_PERCENT_CS2 … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c6856 wcl_cs_reg = mmSPI_WCL_PIPE_PERCENT_CS2; in gfx_v8_0_emit_wave_limit_cs()
H A Dgfx_v9_0.c7168 wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS2); in gfx_v9_0_emit_wave_limit_cs()