Home
last modified time | relevance | path

Searched refs:mmSPI_WCL_PIPE_PERCENT_CS0 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1412 #define mmSPI_WCL_PIPE_PERCENT_CS0 0x31c9 macro
H A Dgfx_7_2_d.h1429 #define mmSPI_WCL_PIPE_PERCENT_CS0 0x31c9 macro
H A Dgfx_8_1_d.h1576 #define mmSPI_WCL_PIPE_PERCENT_CS0 0x31c9 macro
H A Dgfx_8_0_d.h1608 #define mmSPI_WCL_PIPE_PERCENT_CS0 0x31c9 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2699 #define mmSPI_WCL_PIPE_PERCENT_CS0 … macro
H A Dgc_9_1_offset.h2943 #define mmSPI_WCL_PIPE_PERCENT_CS0 … macro
H A Dgc_9_2_1_offset.h2885 #define mmSPI_WCL_PIPE_PERCENT_CS0 … macro
H A Dgc_10_1_0_offset.h5183 #define mmSPI_WCL_PIPE_PERCENT_CS0 … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c6710 wcl_cs_reg = mmSPI_WCL_PIPE_PERCENT_CS0; in gfx_v8_0_emit_wave_limit_cs()
H A Dgfx_v9_0.c7165 wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS0); in gfx_v9_0_emit_wave_limit_cs()