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Searched refs:mmSPI_PS_INPUT_CNTL_15 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1227 #define mmSPI_PS_INPUT_CNTL_15 0xA1A0 macro
H A Dgfx_7_0_d.h1376 #define mmSPI_PS_INPUT_CNTL_15 0xa1a0 macro
H A Dgfx_7_2_d.h1393 #define mmSPI_PS_INPUT_CNTL_15 0xa1a0 macro
H A Dgfx_8_1_d.h1540 #define mmSPI_PS_INPUT_CNTL_15 0xa1a0 macro
H A Dgfx_8_0_d.h1572 #define mmSPI_PS_INPUT_CNTL_15 0xa1a0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3891 #define mmSPI_PS_INPUT_CNTL_15 macro
H A Dgc_9_1_offset.h4121 #define mmSPI_PS_INPUT_CNTL_15 macro
H A Dgc_9_2_1_offset.h4073 #define mmSPI_PS_INPUT_CNTL_15 macro
H A Dgc_10_1_0_offset.h6293 #define mmSPI_PS_INPUT_CNTL_15 macro
H A Dgc_10_3_0_offset.h5920 #define mmSPI_PS_INPUT_CNTL_15 macro