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Searched refs:mmSPI_CONFIG_CNTL_1 (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1478 #define mmSPI_CONFIG_CNTL_1 0x244f macro
H A Dgfx_7_2_d.h1499 #define mmSPI_CONFIG_CNTL_1 0x244f macro
H A Dgfx_8_1_d.h1659 #define mmSPI_CONFIG_CNTL_1 0x244f macro
H A Dgfx_8_0_d.h1691 #define mmSPI_CONFIG_CNTL_1 0x244f macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c516 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070104),
1617 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070105),
1662 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070104),
3380 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffffffff, 0x00070104),
3427 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffffffff, 0x00070104),
H A Dgfx_v9_0.c717 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x0000000f, 0x01000107),
732 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffff010f, 0x01000107),
850 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffff03ff, 0x01000107),
H A Dgfx_v8_0.c414 mmSPI_CONFIG_CNTL_1, 0x0000000f, 0x00000009,
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h5139 #define mmSPI_CONFIG_CNTL_1 … macro
H A Dgc_9_1_offset.h5369 #define mmSPI_CONFIG_CNTL_1 … macro
H A Dgc_9_2_1_offset.h5327 #define mmSPI_CONFIG_CNTL_1 … macro
H A Dgc_10_1_0_offset.h2601 #define mmSPI_CONFIG_CNTL_1 … macro