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Searched refs:mmSMU_BIF_VDDGFX_PWR_STATUS (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_d.h104 #define mmSMU_BIF_VDDGFX_PWR_STATUS 0x14f8 macro
H A Dbif_5_1_d.h95 #define mmSMU_BIF_VDDGFX_PWR_STATUS 0x14f8 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h857 #define mmSMU_BIF_VDDGFX_PWR_STATUS … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h2494 #define mmSMU_BIF_VDDGFX_PWR_STATUS … macro
H A Dnbio_7_0_offset.h4378 #define mmSMU_BIF_VDDGFX_PWR_STATUS … macro