| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v7.c | 85 WREG32(mmSH_MEM_CONFIG, sh_mem_config); in kgd_program_sh_mem_settings()
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| H A D | amdgpu_amdkfd_gfx_v8.c | 79 WREG32(mmSH_MEM_CONFIG, sh_mem_config); in kgd_program_sh_mem_settings()
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| H A D | amdgpu_amdkfd_gfx_v10_3.c | 88 WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, sh_mem_config); in program_sh_mem_settings_v10_3()
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| H A D | amdgpu_amdkfd_gfx_v10.c | 88 WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, sh_mem_config); in kgd_program_sh_mem_settings()
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| H A D | amdgpu_amdkfd_gfx_v9.c | 94 WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmSH_MEM_CONFIG, sh_mem_config); in kgd_gfx_v9_program_sh_mem_settings()
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| H A D | gfx_v9_0.c | 657 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSH_MEM_CONFIG, 0x00001000, 0x00001000),
802 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSH_MEM_CONFIG, 0x00001000, 0x00001000),
2575 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, sh_mem_config); in gfx_v9_0_init_compute_vmid()
2650 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp); in gfx_v9_0_constants_init()
2657 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp); in gfx_v9_0_constants_init()
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| H A D | gfx_v7_0.c | 1833 WREG32(mmSH_MEM_CONFIG, sh_mem_config); in gfx_v7_0_init_compute_vmid()
1938 WREG32(mmSH_MEM_CONFIG, sh_mem_cfg); in gfx_v7_0_constants_init()
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| H A D | gfx_v8_0.c | 3679 WREG32(mmSH_MEM_CONFIG, sh_mem_config); in gfx_v8_0_init_compute_vmid()
3762 WREG32(mmSH_MEM_CONFIG, tmp); in gfx_v8_0_constants_init()
3769 WREG32(mmSH_MEM_CONFIG, tmp); in gfx_v8_0_constants_init()
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| H A D | gfx_v10_0.c | 5083 WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG); in gfx_v10_0_init_compute_vmid()
5228 WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG); in gfx_v10_0_constants_init()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 1945 #define mmSH_MEM_CONFIG 0x230d macro
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| H A D | gfx_7_2_d.h | 1966 #define mmSH_MEM_CONFIG 0x230d macro
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| H A D | gfx_8_1_d.h | 2133 #define mmSH_MEM_CONFIG 0x230d macro
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| H A D | gfx_8_0_d.h | 2165 #define mmSH_MEM_CONFIG 0x230d macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 413 #define mmSH_MEM_CONFIG … macro
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| H A D | gc_9_1_offset.h | 407 #define mmSH_MEM_CONFIG … macro
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| H A D | gc_9_2_1_offset.h | 403 #define mmSH_MEM_CONFIG … macro
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| H A D | gc_10_1_0_offset.h | 2451 #define mmSH_MEM_CONFIG … macro
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| H A D | gc_10_3_0_offset.h | 2540 #define mmSH_MEM_CONFIG … macro
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