Searched refs:mmSDMA1_RLC4_RB_WPTR_POLL_CNTL (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/ |
| H A D | sdma1_4_2_2_offset.h | 720 #define mmSDMA1_RLC4_RB_WPTR_POLL_CNTL … macro
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| H A D | sdma1_4_2_offset.h | 716 #define mmSDMA1_RLC4_RB_WPTR_POLL_CNTL … macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v5_0.c | 136 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
160 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
209 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
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| H A D | sdma_v4_0.c | 252 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 1715 #define mmSDMA1_RLC4_RB_WPTR_POLL_CNTL … macro
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| H A D | gc_10_3_0_offset.h | 1776 #define mmSDMA1_RLC4_RB_WPTR_POLL_CNTL … macro
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