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Searched refs:mmSDMA1_RLC1_RB_WPTR_POLL_CNTL (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h356 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL 0x3785 macro
H A Doss_3_0_1_d.h467 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL 0x3785 macro
H A Doss_2_0_d.h387 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL 0x3785 macro
H A Doss_3_0_d.h565 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL 0x3785 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h468 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL 0x01a7 macro
H A Dsdma1_4_2_2_offset.h468 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL … macro
H A Dsdma1_4_2_offset.h464 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v5_0.c133 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
157 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
206 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
H A Dsdma_v4_0.c159 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
246 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h1466 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL … macro
H A Dgc_10_3_0_offset.h1512 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL … macro