Home
last modified time | relevance | path

Searched refs:mmSDMA0_UTCL1_RD_XNACK1 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h148 #define mmSDMA0_UTCL1_RD_XNACK1 macro
H A Dsdma0_4_0_offset.h150 #define mmSDMA0_UTCL1_RD_XNACK1 0x0044 macro
H A Dsdma0_4_2_2_offset.h150 #define mmSDMA0_UTCL1_RD_XNACK1 macro
H A Dsdma0_4_2_offset.h150 #define mmSDMA0_UTCL1_RD_XNACK1 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v5_2.c74 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_XNACK1),
H A Dsdma_v5_0.c73 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_XNACK1),
H A Dsdma_v4_0.c86 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_XNACK1),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h125 #define mmSDMA0_UTCL1_RD_XNACK1 macro
H A Dgc_10_3_0_offset.h124 #define mmSDMA0_UTCL1_RD_XNACK1 macro