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Searched refs:mmSDMA0_STATUS2_REG (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h124 #define mmSDMA0_STATUS2_REG … macro
H A Dsdma0_4_0_offset.h126 #define mmSDMA0_STATUS2_REG 0x0038 macro
H A Dsdma0_4_2_2_offset.h126 #define mmSDMA0_STATUS2_REG … macro
H A Dsdma0_4_2_offset.h126 #define mmSDMA0_STATUS2_REG … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h186 #define mmSDMA0_STATUS2_REG 0x341e macro
H A Doss_3_0_1_d.h187 #define mmSDMA0_STATUS2_REG 0x3423 macro
H A Doss_3_0_d.h321 #define mmSDMA0_STATUS2_REG 0x3423 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v5_2.c66 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS2_REG),
H A Dsdma_v5_0.c65 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS2_REG),
H A Dsdma_v4_0.c78 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS2_REG),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h101 #define mmSDMA0_STATUS2_REG … macro
H A Dgc_10_3_0_offset.h100 #define mmSDMA0_STATUS2_REG … macro