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Searched refs:mmSDMA0_GFX_IB_OFFSET (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h228 #define mmSDMA0_GFX_IB_OFFSET macro
H A Dsdma0_4_0_offset.h232 #define mmSDMA0_GFX_IB_OFFSET 0x008c macro
H A Dsdma0_4_2_2_offset.h232 #define mmSDMA0_GFX_IB_OFFSET macro
H A Dsdma0_4_2_offset.h228 #define mmSDMA0_GFX_IB_OFFSET macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h199 #define mmSDMA0_GFX_IB_OFFSET 0x348c macro
H A Doss_3_0_1_d.h226 #define mmSDMA0_GFX_IB_OFFSET 0x348c macro
H A Doss_2_0_d.h258 #define mmSDMA0_GFX_IB_OFFSET 0x348c macro
H A Doss_3_0_d.h351 #define mmSDMA0_GFX_IB_OFFSET 0x348c macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v2_4.c441 WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0); in sdma_v2_4_gfx_resume()
H A Dcik_sdma.c467 WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0); in cik_sdma_gfx_resume()
H A Dsdma_v3_0.c682 WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0); in sdma_v3_0_gfx_resume()
H A Dsdma_v5_2.c82 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_OFFSET),
H A Dsdma_v5_0.c81 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_OFFSET),
H A Dsdma_v4_0.c94 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_OFFSET),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h226 #define mmSDMA0_GFX_IB_OFFSET macro
H A Dgc_10_3_0_offset.h214 #define mmSDMA0_GFX_IB_OFFSET macro