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Searched refs:mmSDMA0_CNTL (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v4_0.c1010 f32_cntl = RREG32_SDMA(i, mmSDMA0_CNTL); in sdma_v4_0_ctx_switch_enable()
1018 WREG32_SDMA(i, mmSDMA0_CNTL, f32_cntl); in sdma_v4_0_ctx_switch_enable()
1257 def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL)); in sdma_v4_1_update_power_gating()
1261 WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL), data); in sdma_v4_1_update_power_gating()
1264 def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL)); in sdma_v4_1_update_power_gating()
1267 WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL), data); in sdma_v4_1_update_power_gating()
1282 def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL)); in sdma_v4_1_init_power_gating()
1285 WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL), data); in sdma_v4_1_init_power_gating()
1413 temp = RREG32_SDMA(i, mmSDMA0_CNTL); in sdma_v4_0_start()
1415 WREG32_SDMA(i, mmSDMA0_CNTL, temp); in sdma_v4_0_start()
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/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h68 #define mmSDMA0_CNTL … macro
H A Dsdma0_4_0_offset.h70 #define mmSDMA0_CNTL 0x001c macro
H A Dsdma0_4_2_2_offset.h70 #define mmSDMA0_CNTL … macro
H A Dsdma0_4_2_offset.h70 #define mmSDMA0_CNTL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h161 #define mmSDMA0_CNTL 0x3404 macro
H A Doss_3_0_1_d.h158 #define mmSDMA0_CNTL 0x3404 macro
H A Doss_2_0_d.h223 #define mmSDMA0_CNTL 0x3404 macro
H A Doss_3_0_d.h295 #define mmSDMA0_CNTL 0x3404 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h45 #define mmSDMA0_CNTL … macro