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Searched refs:mmSDMA0_CLK_CTRL (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h66 #define mmSDMA0_CLK_CTRL … macro
H A Dsdma0_4_0_offset.h68 #define mmSDMA0_CLK_CTRL 0x001b macro
H A Dsdma0_4_2_2_offset.h68 #define mmSDMA0_CLK_CTRL … macro
H A Dsdma0_4_2_offset.h68 #define mmSDMA0_CLK_CTRL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h160 #define mmSDMA0_CLK_CTRL 0x3403 macro
H A Doss_3_0_1_d.h157 #define mmSDMA0_CLK_CTRL 0x3403 macro
H A Doss_2_0_d.h222 #define mmSDMA0_CLK_CTRL 0x3403 macro
H A Doss_3_0_d.h294 #define mmSDMA0_CLK_CTRL 0x3403 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v5_0.c1766 def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); in sdma_v5_0_update_medium_grain_clock_gating()
1776 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); in sdma_v5_0_update_medium_grain_clock_gating()
1779 def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); in sdma_v5_0_update_medium_grain_clock_gating()
1789 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); in sdma_v5_0_update_medium_grain_clock_gating()
1858 data = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_CLK_CTRL)); in sdma_v5_0_get_clockgating_state()
H A Dsdma_v5_2.c1735 def = data = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); in sdma_v5_2_update_medium_grain_clock_gating()
1743 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); in sdma_v5_2_update_medium_grain_clock_gating()
1746 def = data = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); in sdma_v5_2_update_medium_grain_clock_gating()
1754 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); in sdma_v5_2_update_medium_grain_clock_gating()
1833 data = RREG32(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_CLK_CTRL)); in sdma_v5_2_get_clockgating_state()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h43 #define mmSDMA0_CLK_CTRL … macro