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Searched refs:mmSCRATCH_REG2 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h217 #define mmSCRATCH_REG2 … macro
H A Dgc_9_0_offset.h4645 #define mmSCRATCH_REG2 … macro
H A Dgc_9_1_offset.h4875 #define mmSCRATCH_REG2 … macro
H A Dgc_9_2_1_offset.h4831 #define mmSCRATCH_REG2 … macro
H A Dgc_10_1_0_offset.h7129 #define mmSCRATCH_REG2 … macro
H A Dgc_10_3_0_offset.h6752 #define mmSCRATCH_REG2 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1183 #define mmSCRATCH_REG2 0x2142 macro
H A Dgfx_7_0_d.h406 #define mmSCRATCH_REG2 0xc042 macro
H A Dgfx_7_2_d.h418 #define mmSCRATCH_REG2 0xc042 macro
H A Dgfx_8_1_d.h456 #define mmSCRATCH_REG2 0xc042 macro
H A Dgfx_8_0_d.h456 #define mmSCRATCH_REG2 0xc042 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c1816 reg_access_ctrl->scratch_reg2 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG2); in gfx_v9_0_init_rlcg_reg_access_ctrl()
H A Dgfx_v10_0.c4306 reg_access_ctrl->scratch_reg2 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG2); in gfx_v10_0_init_rlcg_reg_access_ctrl()