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Searched refs:mmSCL0_SCL_UPDATE (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h4132 #define mmSCL0_SCL_UPDATE 0x1B51 macro
H A Ddce_8_0_d.h4931 #define mmSCL0_SCL_UPDATE 0x1b51 macro
H A Ddce_10_0_d.h5647 #define mmSCL0_SCL_UPDATE 0x1b51 macro
H A Ddce_11_0_d.h5705 #define mmSCL0_SCL_UPDATE 0x1b51 macro
H A Ddce_11_2_d.h7032 #define mmSCL0_SCL_UPDATE 0x1b51 macro
H A Ddce_12_0_offset.h4006 #define mmSCL0_SCL_UPDATE … macro