Home
last modified time | relevance | path

Searched refs:mmRLC_SPM_INT_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1324 #define mmRLC_SPM_INT_CNTL 0x3132 macro
H A Dgfx_7_2_d.h1337 #define mmRLC_SPM_INT_CNTL 0x3132 macro
H A Dgfx_8_1_d.h1436 #define mmRLC_SPM_INT_CNTL 0xec72 macro
H A Dgfx_8_0_d.h1439 #define mmRLC_SPM_INT_CNTL 0xec72 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6117 #define mmRLC_SPM_INT_CNTL macro
H A Dgc_9_1_offset.h6339 #define mmRLC_SPM_INT_CNTL macro
H A Dgc_9_2_1_offset.h6317 #define mmRLC_SPM_INT_CNTL macro
H A Dgc_10_1_0_offset.h9463 #define mmRLC_SPM_INT_CNTL macro
H A Dgc_10_3_0_offset.h9285 #define mmRLC_SPM_INT_CNTL macro