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Searched refs:mmRLC_PG_DELAY_2 (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1263 #define mmRLC_PG_DELAY_2 0x30df macro
H A Dgfx_7_2_d.h1276 #define mmRLC_PG_DELAY_2 0x30df macro
H A Dgfx_8_1_d.h1371 #define mmRLC_PG_DELAY_2 0xec1f macro
H A Dgfx_8_0_d.h1370 #define mmRLC_PG_DELAY_2 0xec1f macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c3825 data = RREG32(mmRLC_PG_DELAY_2); in gfx_v7_0_init_gfx_cgpg()
3828 WREG32(mmRLC_PG_DELAY_2, data); in gfx_v7_0_init_gfx_cgpg()
H A Dgfx_v9_0.c2934 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_2)); in gfx_v9_0_init_gfx_power_gating()
2937 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_2), data); in gfx_v9_0_init_gfx_power_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6013 #define mmRLC_PG_DELAY_2 macro
H A Dgc_9_1_offset.h6235 #define mmRLC_PG_DELAY_2 macro
H A Dgc_9_2_1_offset.h6199 #define mmRLC_PG_DELAY_2 macro
H A Dgc_10_1_0_offset.h9343 #define mmRLC_PG_DELAY_2 macro
H A Dgc_10_3_0_offset.h9145 #define mmRLC_PG_DELAY_2 macro