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Searched refs:mmRLC_LB_THR_CONFIG_1 (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c1703 WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_1, 0x0000007F); in gfx_v9_0_init_lbpw()
1752 WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_1, 0x0000007F); in gfx_v9_4_init_lbpw()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6241 #define mmRLC_LB_THR_CONFIG_1 … macro
H A Dgc_9_1_offset.h6463 #define mmRLC_LB_THR_CONFIG_1 … macro
H A Dgc_9_2_1_offset.h6439 #define mmRLC_LB_THR_CONFIG_1 … macro