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Searched refs:mmRLC_GPU_IOV_CFG_REG1 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h1524 #define mmRLC_GPU_IOV_CFG_REG1 0xfb01 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6805 #define mmRLC_GPU_IOV_CFG_REG1 macro
H A Dgc_9_1_offset.h7031 #define mmRLC_GPU_IOV_CFG_REG1 macro
H A Dgc_9_2_1_offset.h7067 #define mmRLC_GPU_IOV_CFG_REG1 macro
H A Dgc_10_1_0_offset.h10391 #define mmRLC_GPU_IOV_CFG_REG1 macro
H A Dgc_10_3_0_offset.h10117 #define mmRLC_GPU_IOV_CFG_REG1 macro