Home
last modified time | relevance | path

Searched refs:mmRLC_CSIB_ADDR_LO (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h1477 #define mmRLC_CSIB_ADDR_LO 0xeca2 macro
H A Dgfx_8_0_d.h1481 #define mmRLC_CSIB_ADDR_LO 0xeca2 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6195 #define mmRLC_CSIB_ADDR_LO … macro
H A Dgc_9_1_offset.h6417 #define mmRLC_CSIB_ADDR_LO … macro
H A Dgc_9_2_1_offset.h6393 #define mmRLC_CSIB_ADDR_LO … macro
H A Dgc_10_1_0_offset.h9529 #define mmRLC_CSIB_ADDR_LO … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c5466 WREG32_SOC15_RLC(GC, 0, mmRLC_CSIB_ADDR_LO, in gfx_v10_0_init_csb()
5472 WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_LO, in gfx_v10_0_init_csb()
H A Dgfx_v8_0.c3875 WREG32(mmRLC_CSIB_ADDR_LO, in gfx_v8_0_init_csb()
H A Dgfx_v9_0.c2779 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_ADDR_LO), in gfx_v9_0_init_csb()