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Searched refs:mmRLC_AUTO_PG_CTRL (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1293 #define mmRLC_AUTO_PG_CTRL 0x3115 macro
H A Dgfx_7_2_d.h1306 #define mmRLC_AUTO_PG_CTRL 0x3115 macro
H A Dgfx_8_1_d.h1406 #define mmRLC_AUTO_PG_CTRL 0xec55 macro
H A Dgfx_8_0_d.h1406 #define mmRLC_AUTO_PG_CTRL 0xec55 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c2878 tmp = RREG32(mmRLC_AUTO_PG_CTRL); in gfx_v6_0_init_gfx_cgpg()
2882 WREG32(mmRLC_AUTO_PG_CTRL, tmp); in gfx_v6_0_init_gfx_cgpg()
H A Dgfx_v9_0.c2986 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_AUTO_PG_CTRL)); in gfx_v9_0_init_gfx_power_gating()
2991 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_AUTO_PG_CTRL), data); in gfx_v9_0_init_gfx_power_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6069 #define mmRLC_AUTO_PG_CTRL … macro
H A Dgc_9_1_offset.h6291 #define mmRLC_AUTO_PG_CTRL … macro
H A Dgc_9_2_1_offset.h6267 #define mmRLC_AUTO_PG_CTRL … macro
H A Dgc_10_1_0_offset.h9417 #define mmRLC_AUTO_PG_CTRL … macro