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Searched refs:mmPIPE0_DMIF_BUFFER_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v10_0.c632 tmp = RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset); in dce_v10_0_line_buffer_adjust()
634 WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset, tmp); in dce_v10_0_line_buffer_adjust()
637 tmp = RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset); in dce_v10_0_line_buffer_adjust()
H A Ddce_v8_0.c587 WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset, in dce_v8_0_line_buffer_adjust()
590 if (RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset) & in dce_v8_0_line_buffer_adjust()
H A Ddce_v6_0.c1093 WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset, in dce_v6_0_line_buffer_adjust()
1096 if (RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset) & in dce_v6_0_line_buffer_adjust()
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h4020 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x0328 macro
H A Ddce_8_0_d.h1229 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x328 macro
H A Ddce_10_0_d.h1525 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x321 macro
H A Ddce_11_0_d.h1346 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x321 macro
H A Ddce_11_2_d.h1426 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x321 macro
H A Ddce_12_0_offset.h1044 #define mmPIPE0_DMIF_BUFFER_CONTROL macro