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Searched refs:mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_3_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h770 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_3_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h2303 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_3_BASE_IDX … macro
H A Dnbio_7_0_offset.h4185 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_3_BASE_IDX … macro
H A Dnbio_7_4_offset.h2623 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_3_BASE_IDX … macro
H A Dnbio_2_3_offset.h275 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_3_BASE_IDX … macro