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Searched refs:mmPA_SC_RASTER_CONFIG (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c128 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x3a00161a,
271 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x16000012,
H A Dgfx_v8_0.c220 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x16000012,
316 mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x3a00161a,
347 mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x16000012,
379 mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x16000012,
394 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x16000012,
406 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x3a00161a,
479 mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x00000002,
494 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x00000002,
590 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x00000002,
695 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x00000000,
[all …]
H A Dgfx_v7_0.c1732 WREG32(mmPA_SC_RASTER_CONFIG, raster_config_se); in gfx_v7_0_write_harvested_raster_configs()
1778 WREG32(mmPA_SC_RASTER_CONFIG, raster_config); in gfx_v7_0_setup_rb()
1795 RREG32(mmPA_SC_RASTER_CONFIG); in gfx_v7_0_setup_rb()
2498 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()
3910 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1003 #define mmPA_SC_RASTER_CONFIG 0xA0D4 macro
H A Dgfx_7_0_d.h1019 #define mmPA_SC_RASTER_CONFIG 0xa0d4 macro
H A Dgfx_7_2_d.h1032 #define mmPA_SC_RASTER_CONFIG 0xa0d4 macro
H A Dgfx_8_1_d.h1115 #define mmPA_SC_RASTER_CONFIG 0xa0d4 macro
H A Dgfx_8_0_d.h1114 #define mmPA_SC_RASTER_CONFIG 0xa0d4 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3581 #define mmPA_SC_RASTER_CONFIG … macro
H A Dgc_9_1_offset.h3811 #define mmPA_SC_RASTER_CONFIG … macro
H A Dgc_9_2_1_offset.h3761 #define mmPA_SC_RASTER_CONFIG … macro
H A Dgc_10_1_0_offset.h5971 #define mmPA_SC_RASTER_CONFIG … macro
H A Dgc_10_3_0_offset.h5600 #define mmPA_SC_RASTER_CONFIG … macro