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Searched refs:mmPA_CL_UCP_0_W (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h812 #define mmPA_CL_UCP_0_W 0xA172 macro
H A Dgfx_7_0_d.h927 #define mmPA_CL_UCP_0_W 0xa172 macro
H A Dgfx_7_2_d.h940 #define mmPA_CL_UCP_0_W 0xa172 macro
H A Dgfx_8_1_d.h1022 #define mmPA_CL_UCP_0_W 0xa172 macro
H A Dgfx_8_0_d.h1022 #define mmPA_CL_UCP_0_W 0xa172 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3819 #define mmPA_CL_UCP_0_W … macro
H A Dgc_9_1_offset.h4049 #define mmPA_CL_UCP_0_W … macro
H A Dgc_9_2_1_offset.h3999 #define mmPA_CL_UCP_0_W … macro
H A Dgc_10_1_0_offset.h6219 #define mmPA_CL_UCP_0_W … macro
H A Dgc_10_3_0_offset.h5846 #define mmPA_CL_UCP_0_W … macro