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Searched refs:mmOTG4_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h7268 #define mmOTG4_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h8904 #define mmOTG4_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h8812 #define mmOTG4_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h9935 #define mmOTG4_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h9674 #define mmOTG4_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX … macro