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Searched refs:mmMP1_SMN_C2PMSG_82_BASE_IDX (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_12_0_0_offset.h283 #define mmMP1_SMN_C2PMSG_82_BASE_IDX … macro
H A Dmp_10_0_offset.h283 #define mmMP1_SMN_C2PMSG_82_BASE_IDX … macro
H A Dmp_9_0_offset.h295 #define mmMP1_SMN_C2PMSG_82_BASE_IDX 0 macro
H A Dmp_11_0_offset.h285 #define mmMP1_SMN_C2PMSG_82_BASE_IDX … macro
H A Dmp_11_0_8_offset.h283 #define mmMP1_SMN_C2PMSG_82_BASE_IDX … macro
H A Dmp_11_5_0_offset.h283 #define mmMP1_SMN_C2PMSG_82_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_4_ppt.c50 #define mmMP1_SMN_C2PMSG_82_BASE_IDX 1 macro
H A Dsmu_v13_0.c68 #define mmMP1_SMN_C2PMSG_82_BASE_IDX … macro
H A Dsmu_v13_0_0_ppt.c77 #define mmMP1_SMN_C2PMSG_82_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c48 #define mmMP1_SMN_C2PMSG_82_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c50 #define mmMP1_SMN_C2PMSG_82_BASE_IDX 0 macro