Home
last modified time | relevance | path

Searched refs:mmMP0_SMN_C2PMSG_102 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v11_0_8.c79 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v11_0_8_ring_create()
156 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102); in psp_v11_0_8_ring_get_wptr()
168 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value); in psp_v11_0_8_ring_set_wptr()
H A Dpsp_v11_0.c332 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v11_0_ring_create()
602 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value); in psp_v11_0_ring_set_wptr()
/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_12_0_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 macro
H A Dmp_10_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 macro
H A Dmp_9_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 0x00a6 macro
H A Dmp_11_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 macro
H A Dmp_11_0_8_offset.h168 #define mmMP0_SMN_C2PMSG_102 macro
H A Dmp_11_5_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 macro