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Searched refs:mmMMVM_L2_CACHE_PARITY_CNTL_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_2_0_0_offset.h1065 #define mmMMVM_L2_CACHE_PARITY_CNTL_BASE_IDX … macro
H A Dmmhub_2_3_0_offset.h1447 #define mmMMVM_L2_CACHE_PARITY_CNTL_BASE_IDX … macro