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Searched refs:mmMMSCH_GPUIOV_SCH_BLOCK_IP_1_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmmsch_v2_0.h182 #define mmMMSCH_GPUIOV_SCH_BLOCK_IP_1_BASE_IDX macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_3_0_0_offset.h170 #define mmMMSCH_GPUIOV_SCH_BLOCK_IP_1_BASE_IDX macro