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Searched refs:mmMMEA1_DRAM_WR_PRI_QUEUING_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_3_0_offset.h865 #define mmMMEA1_DRAM_WR_PRI_QUEUING_BASE_IDX … macro
H A Dmmhub_9_1_offset.h863 #define mmMMEA1_DRAM_WR_PRI_QUEUING_BASE_IDX … macro