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Searched refs:mmMME0_QM_GLBL_CFG0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dmme0_qm_regs.h22 #define mmMME0_QM_GLBL_CFG0 0x68000 macro
/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c409 [SP_MME_CMDQ] = mmMME0_QM_GLBL_CFG0,
411 [SP_NEXT_MME] = mmMME2_QM_GLBL_CFG0 - mmMME0_QM_GLBL_CFG0,
2919 (mmMME1_QM_GLBL_CFG0 - mmMME0_QM_GLBL_CFG0) / 2; in gaudi_init_mme_qman()
2970 mme_offset = mmMME2_QM_GLBL_CFG0 - mmMME0_QM_GLBL_CFG0; in gaudi_init_mme_qmans()
2983 mme_offset = mmMME2_QM_GLBL_CFG0 - mmMME0_QM_GLBL_CFG0; in gaudi_init_mme_qmans()
2988 WREG32(mmMME0_QM_GLBL_CFG0, QMAN_MME_ENABLE); in gaudi_init_mme_qmans()
3318 WREG32(mmMME0_QM_GLBL_CFG0, 0); in gaudi_disable_mme_qmans()
H A Dgaudi_security.c555 pb_addr = (mmMME0_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; in gaudi_init_mme_protection_bits()
556 word_offset = ((mmMME0_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; in gaudi_init_mme_protection_bits()
557 mask = 1U << ((mmMME0_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()