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Searched refs:mmMC_VM_NB_TOP_OF_DRAM_SLOT1_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_3_0_offset.h1919 #define mmMC_VM_NB_TOP_OF_DRAM_SLOT1_BASE_IDX … macro
H A Dmmhub_9_1_offset.h1931 #define mmMC_VM_NB_TOP_OF_DRAM_SLOT1_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1651 #define mmMC_VM_NB_TOP_OF_DRAM_SLOT1_BASE_IDX … macro
H A Dgc_9_1_offset.h1670 #define mmMC_VM_NB_TOP_OF_DRAM_SLOT1_BASE_IDX … macro
H A Dgc_9_2_1_offset.h1608 #define mmMC_VM_NB_TOP_OF_DRAM_SLOT1_BASE_IDX … macro