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Searched refs:mmMCIF_WB1_MCIF_WB_NB_PSTATE_CONTROL (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h1548 #define mmMCIF_WB1_MCIF_WB_NB_PSTATE_CONTROL … macro
H A Ddcn_2_1_0_offset.h1134 #define mmMCIF_WB1_MCIF_WB_NB_PSTATE_CONTROL … macro
H A Ddcn_2_0_0_offset.h1172 #define mmMCIF_WB1_MCIF_WB_NB_PSTATE_CONTROL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h384 #define mmMCIF_WB1_MCIF_WB_NB_PSTATE_CONTROL … macro