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Searched refs:mmHPD3_DC_HPD_CONTROL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h7539 #define mmHPD3_DC_HPD_CONTROL_BASE_IDX macro
H A Ddcn_1_0_offset.h7856 #define mmHPD3_DC_HPD_CONTROL_BASE_IDX macro
H A Ddcn_2_1_0_offset.h9416 #define mmHPD3_DC_HPD_CONTROL_BASE_IDX macro
H A Ddcn_3_0_2_offset.h9112 #define mmHPD3_DC_HPD_CONTROL_BASE_IDX macro
H A Ddcn_2_0_0_offset.h10455 #define mmHPD3_DC_HPD_CONTROL_BASE_IDX macro
H A Ddcn_3_0_0_offset.h10200 #define mmHPD3_DC_HPD_CONTROL_BASE_IDX macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h9741 #define mmHPD3_DC_HPD_CONTROL_BASE_IDX macro